Electronic Design Automation
Saleem Bekkali
USC · CompE & CS ’25 · Founder
Aluming / Visual AI for chip design
Visual AI for analog chip design.
Automate the manual work of inspecting layouts, reading simulation plots, and revising designs—with specialized visual models and simulation feedback in one workspace.
Aluming workbenchSchematic · Simulation · AI
Working desktop platformPDK import workflowsNSF I-Corps 2026Analog / RFIC expertiseTeam alumni: USC / UC Berkeley
Analog design is visual
Less manual work. More engineering.
Engineers spend hours inspecting geometry, interpreting waveforms, and revising designs by hand. Aluming brings visual AI into that loop, starting with focused inspection and repair workflows.
01 / A connected design workspace
Keep the design and its context together.
Work with schematics, simulation plots, and layouts in one place. Aluming connects the design tools with specialized visual models so inspection and iteration stay close to the work.
Explore the workspace
02 / Specialized visual AI
AI that reads the visual work.
Our visual models are built to recognize layout layers and interpret simulation plots. Ask for a focused design task, review the AI’s proposed action, and use the result to guide your next change.
See the design assistant
03 / Engineer review and verification
Propose. Review. Verify.
Engineers review and refine the AI’s proposed changes. Simulation and design checks test the result, connecting visual inspection to a verifiable engineering outcome.
Follow schematic to verified GDS
Built for engineering work
Technical Foundations
A practical view of the platform and what to confirm for your design.
- Process kits
- Bundled synthetic CMOS for exploration. Bring-your-own gpdk045 import; compatibility depends on your kit. Details
- Scripting / API
- Command-based tools and scripted workflows. Ask about automation for your beta build. Details
- Local / cloud
- Desktop design workspace; hosted trial access by arrangement. AI services require connectivity. Details
- Operating systems
- Linux development and hosted trials. Confirm desktop availability for your OS during onboarding. Details
Private beta. Process support and verification coverage depend on the selected kit and build; demo checks do not establish foundry signoff.
Why Aluming
From visual inspection to verified changes.
The manual loop
Inspect → Interpret → Edit by hand → Run checks → Repeat
The Aluming workflow
Visual AI → Proposed action → Engineer review → Simulation & verification
See the evidence
A working product, on screen.
Watch the recorded inverter flow through schematic, simulation, layout, DRC, LVS, and GDS export.
The team
Built around the analog design loop.
ML & software
Danial Toktarbayev
UC Berkeley · CS & DS ’25 · Co-founder
ML & optimization
Denys Ruban
PhD candidate, Applied Math · Co-founder
RF / analog IC design
Gurkan Colak
GF Foundry Manager · Advisor
Start exploring
Know your next step.
For analog engineers
What would you automate first?
Tell us which inspection, analysis, or design task takes your team the most manual effort, along with your PDK and operating system. We’ll follow up about private beta access.